Multiprocessor System-on-Chip [electronic resource]: Hardware Design and Tool Integration / edited by Michael Hubner, Jurgen Becker.
Tipo de material: TextoDescripción: X, 300p. 100 illus. online resourceISBN: 9781441964601 99781441964601Tema(s): Engineering | Engineering | COMPUTER, AIDED ENGINEERING (CAD, CAE) AND DESIGN | COMPUTER AIDED DESIGN | CIRCUITS AND SYSTEMS | SYSTEMS ENGINEERINGClasificación CDD: 621.3815 Recursos en línea: ir a documento Resumen: Improving future electronic system performance can only be achieved by exploiting parallelism on all system levels. Multicore architectures offer a better performance/Watt ratio than single core architectures with similar performance. Combining multicore and coprocessor technology promises extreme computing power for highly CPU-time-consuming applications. FPGA-based accelerators not only offer the opportunity to speed up an application by implementing their compute-intensive kernels into hardware, but also to adapt to the dynamical behavior of an application. This book describes strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools are discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design. This book deals with key issues such as on-chip communication architectures, integration of reconfigurable hardware, and physical design of multiprocessor systems. Provides a state-of-the-art overview of system design using MPSoC architectures; Describes current trends in on-chip communication architectures; Offers extensive coverage of system design integrating MPSoC architectures with reconfigurable hardware; Includes coverage of challenges in physical design for multi- and manycore hardware architectures.Tipo de ítem | Ubicación actual | Colección | Signatura | Info Vol | Copia número | Estado | Fecha de vencimiento | Código de barras | Reserva de ítems |
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DOCUMENTOS DIGITALES | Biblioteca Jorge Álvarez Lleras | Digital | 621.3815 223 (Navegar estantería) | Ej. 1 | 1 | Disponible | D000558 |
Improving future electronic system performance can only be achieved by exploiting parallelism on all system levels. Multicore architectures offer a better performance/Watt ratio than single core architectures with similar performance. Combining multicore and coprocessor technology promises extreme computing power for highly CPU-time-consuming applications. FPGA-based accelerators not only offer the opportunity to speed up an application by implementing their compute-intensive kernels into hardware, but also to adapt to the dynamical behavior of an application. This book describes strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools are discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design. This book deals with key issues such as on-chip communication architectures, integration of reconfigurable hardware, and physical design of multiprocessor systems. Provides a state-of-the-art overview of system design using MPSoC architectures; Describes current trends in on-chip communication architectures; Offers extensive coverage of system design integrating MPSoC architectures with reconfigurable hardware; Includes coverage of challenges in physical design for multi- and manycore hardware architectures.
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