Analog Layout Synthesis [electronic resource]: A Survey of Topological Approaches / edited by Helmut E. Graeb.
Tipo de material: TextoDescripción: XV, 302p. 153 illus. online resourceISBN: 9781441969323 99781441969323Tema(s): Engineering | Engineering | COMPUTER, AIDED ENGINEERING (CAD, CAE) AND DESIGN | COMPUTER AIDED DESIGN | CIRCUITS AND SYSTEMS | SYSTEMS ENGINEERINGClasificación CDD: 621.3815 Recursos en línea: ir a documentoTipo de ítem | Ubicación actual | Colección | Signatura | Info Vol | Copia número | Estado | Fecha de vencimiento | Código de barras | Reserva de ítems |
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DOCUMENTOS DIGITALES | Biblioteca Jorge Álvarez Lleras | Digital | 621.3815 223 (Navegar estantería) | Ej. 1 | 1 | Disponible | D000208 |
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621.3815 223 Design and Analysis of Biomolecular Circuits | 621.3815 223 On-Chip Interconnect with aelite | 621.3815 223 Low Power Networks-on-Chip | 621.3815 223 Analog Layout Synthesis | 621.3815 223 Soft Errors in Modern Electronic Systems | 621.3815 223 Ultra-thin Chip Technology and Applications | 621.3815 223 Run-time Adaptation for Reconfigurable Embedded Processors |
Device-level topological placement with symmetry constraints -- Hierarchical placement with layout constraints -- Enhanced shape functions for deterministic analog placement -- Free-Shape Routing for Analog and RF circuits -- Closing the gap between electrical and physical design of analog circuits: the layout-aware solution -- Analog layout retargeting -- Template-driven analog layout automation -- Place and route of analog circuits.
Analog Layout Synthesis: A Survey of Topological Approaches Edited by: Helmut E. Graeb Analog components appear on 75% of all chips, and cause 40% of the design effort and 50% of the re-designs. Due to increasing functional complexity of systems-on-chip, the difficulties in analog design and the lack of design automation support for analog circuits make analog components a bottleneck in chip design. Design methodology and design automation for analog circuits therefore is a crucial problem for developing systems-on-chip and layout synthesis is a key part of the analog design flow. Layout design is the step of the analog design flow with the least support by commercially available, computer-aided design tools. This book provides a survey of promising new approaches to automated, analog layout design, which have been described recently and are rapidly being adopted in industry. óPresents a comprehensive survey of promising new methods for automated, analog layout design; óCovers a variety recent of approaches to topological placement of analog circuits; óProvides a comprehensive overview of routing issues and techniques for analog circuits; óProvides a complete view of analog layout in the design flow, including retargeting an existing layout for a new technology, integrating layout in the sizing process, and constraint management; óRepresents a one-of-a-kind, single-source reference to the latest advances in analog layout synthesis.
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