Entropy Coders of the H.264 /AVC Standard [electronic resource]: Algorithms and VLSI Architectures / by Xiaohua Tian, Thinh M. Le, Yong Lian.
Tipo de material: TextoSeries Signals and Communication Technology; Descripción: XXIV, 180 p. online resourceISBN: 9783642147036 99783642147036Tema(s): Engineering | Engineering | COMMUNICATIONS ENGINEERING, NETWORKS | TELECOMUNICACIÓNClasificación CDD: 621.382 Recursos en línea: ir a documentoTipo de ítem | Ubicación actual | Colección | Signatura | Info Vol | Copia número | Estado | Fecha de vencimiento | Código de barras | Reserva de ítems |
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DOCUMENTOS DIGITALES | Biblioteca Jorge Álvarez Lleras | Digital | 621.382 223 (Navegar estantería) | Ej. 1 | 1 | Disponible | D000357 |
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621.382 223 Optical Remote Sensing | 621.382 223 Digital Filters | 621.382 223 Voice over IP Networks | 621.382 223 Entropy Coders of the H.264 /AVC Standard | 621.382 223 Variational and Level Set Methods in Image Segmentation | 621.382 223 Digital Signal Processing | 621.382 223 The Emerging Domain of Cooperating Objects |
Introduction to Video Compression -- Review of Arithmetic Coding and CABAC -- Review of Existing Statistical Codec Designs -- Design of a CABAC Encoder -- Efficient Architecture of Context Modeling of CABAC Encoder -- Design of System Bus Interface & Inter-connection of SoCbased CABAC Encoder.
This book presents a collection of algorithms and VLSI architectures of entropy (or statistical) codecs of recent video compression standards, with focus on the H.264/AVC standard. For any visual data compression scheme, there exists a combination of one, two, or all of the following three stages: spatial, temporal, and statistical compression. General readers are first introduced with the various algorithms of the statistical coders. The VLSI implementations are also reviewed and discussed. Readers with limited hardware design background are also introduced with a design methodology starting from performance-complexity analysis to software/ hardware co-simulation. A typical design of the Context-based Adaptive Binary Arithmetic Coding (CABAC) encoder is also presented in details. To support System-on-Chip design environment, the CABAC design is wrapped with a SoC-based Wishbone system bus interface.
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