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VLSI Physical Design: From Graph Partitioning to Timing Closure [electronic resource] / by Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu.

By: Kahng, Andrew B [author.].
Contributor(s): Lienig, Jens | [author.] | Markov, Igor L | [author.] | Hu, Jin | [author.] | SpringerLink (Online service).
Material type: materialTypeLabelBookDescription: XII, 310 p. 150 illus. online resource.ISBN: 9789048195916 99789048195916.Subject(s): Engineering | Engineering | COMPUTER, AIDED ENGINEERING (CAD, CAE) AND DESIGN | LOGIC DESIGN | LOGIC DESIGN | COMPUTER AIDED DESIGN | ELECTRONICS AND MICROELECTRONICS, INDTRUMENTATION | CIRCUITS AND SYSTEMS | ELECTRONICS | SYSTEMS ENGINEERINGDDC classification: 621.3815 Online resources: ir a documento Summary: Design and optimization of integrated circuits are essential to the creation of new semiconductor chips, and physical optimizations are becoming more prominent as a result of semiconductor scaling. Modern chip design has become so complex that it is largely performed by specialized software, which is frequently updated to address advances in semiconductor technologies and increased problem complexities. A user of such software needs a high-level understanding of the underlying mathematical models and algorithms. On the other hand, a developer of such software must have a keen understanding of computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. VLSI Physical Design: From Graph Partitioning to Timing Closure introduces and compares algorithms that are used during the physical design phase of integrated-circuit design, wherein a geometric chip layout is produced starting from an abstract circuit design. The emphasis is on essential and fundamental techniques, ranging from hypergraph partitioning and circuit placement to timing closure.
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Item type Current location Collection Call number Vol info Copy number Status Date due Barcode Item holds
DOCUMENTOS DIGITALES DOCUMENTOS DIGITALES Biblioteca Jorge Álvarez Lleras
Digital 621.3815 223 (Browse shelf) Ej. 1 1 Available D000769
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Design and optimization of integrated circuits are essential to the creation of new semiconductor chips, and physical optimizations are becoming more prominent as a result of semiconductor scaling. Modern chip design has become so complex that it is largely performed by specialized software, which is frequently updated to address advances in semiconductor technologies and increased problem complexities. A user of such software needs a high-level understanding of the underlying mathematical models and algorithms. On the other hand, a developer of such software must have a keen understanding of computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. VLSI Physical Design: From Graph Partitioning to Timing Closure introduces and compares algorithms that are used during the physical design phase of integrated-circuit design, wherein a geometric chip layout is produced starting from an abstract circuit design. The emphasis is on essential and fundamental techniques, ranging from hypergraph partitioning and circuit placement to timing closure.

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