000 02827nam a2200253za04500
001 17098
008 050703s2011 xxu eng d
020 _a9781441969323 99781441969323
082 _a621.3815
_b223
245 _aAnalog Layout Synthesis
_h[electronic resource]:
_bA Survey of Topological Approaches /
_cedited by Helmut E. Graeb.
300 _aXV, 302p. 153 illus.
_bonline resource.
505 _aDevice-level topological placement with symmetry constraints -- Hierarchical placement with layout constraints -- Enhanced shape functions for deterministic analog placement -- Free-Shape Routing for Analog and RF circuits -- Closing the gap between electrical and physical design of analog circuits: the layout-aware solution -- Analog layout retargeting -- Template-driven analog layout automation -- Place and route of analog circuits.
520 _aAnalog Layout Synthesis: A Survey of Topological Approaches Edited by: Helmut E. Graeb Analog components appear on 75% of all chips, and cause 40% of the design effort and 50% of the re-designs. Due to increasing functional complexity of systems-on-chip, the difficulties in analog design and the lack of design automation support for analog circuits make analog components a bottleneck in chip design. Design methodology and design automation for analog circuits therefore is a crucial problem for developing systems-on-chip and layout synthesis is a key part of the analog design flow. Layout design is the step of the analog design flow with the least support by commercially available, computer-aided design tools. This book provides a survey of promising new approaches to automated, analog layout design, which have been described recently and are rapidly being adopted in industry. óPresents a comprehensive survey of promising new methods for automated, analog layout design; óCovers a variety recent of approaches to topological placement of analog circuits; óProvides a comprehensive overview of routing issues and techniques for analog circuits; óProvides a complete view of analog layout in the design flow, including retargeting an existing layout for a new technology, integrating layout in the sizing process, and constraint management; óRepresents a one-of-a-kind, single-source reference to the latest advances in analog layout synthesis.
650 _aEngineering.
_996
650 _aEngineering.
_996
650 _933761
_aCOMPUTER, AIDED ENGINEERING (CAD, CAE) AND DESIGN
650 _933757
_aCOMPUTER AIDED DESIGN
650 _933660
_aCIRCUITS AND SYSTEMS.
650 _933673
_aSYSTEMS ENGINEERING
700 _aGraeb, Helmut E.
_eEd.
_934125
710 _aSpringerLink (Online service)
_9111
856 _uhttp://springer.escuelaing.metaproxy.org/book/10.1007/978-1-4419-6932-3
_yir a documento
_qURL
942 _2ddc
_cCF
999 _c13865
_d13865