000			03568nam a2200313za04500
001			17766
008			050703s2011 ne eng d
020			_a9789048197255 99789048197255
082			_a621.381 _b223
100			_aZjajo, Amir. _eauthor. _935164
245			_aLow-Power High-Resolution Analog to Digital Converters _h[electronic resource]: _bDesign, Test and Calibration / _cby Amir Zjajo, José Pineda de Gyvez.
300			_aXX, 250p. 100 illus. in color. _bonline resource.
490			_aAnalog Circuits and Signal Processing
505			_aForeword -- Abbrevations.--Symbols -- 1. Introduction -- 2. Analog to Digital Conversion -- 3. Design of Multi-Step A/D Converters -- 4. Multi-Step A/D Converter Testing -- 5. Multi-Step A/D Converter Debugging -- 6. Conclusions and Recommendations -- Appendix -- References -- Index.-.
520			_aWith the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. This has recently generated a great demand for low-power, low-voltage A/D converters that can be realized in a mainstream deep-submicron CMOS technology. However, the discrepancies between lithography wavelengths and circuit feature sizes are increasing. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. The inherent randomness of materials used in fabrication at nanoscopic scales means that performance will be increasingly variable, not only from die-to-die but also within each individual die. Parametric variability will be compounded by degradation in nanoscale integrated circuits resulting in instability of parameters over time, eventually leading to the development of faults. Process variation cannot be solved by improving manufacturing tolerances; variability must be reduced by new device technology or managed by design in order for scaling to continue. Similarly, within-die performance variation also imposes new challenges for test methods. In an attempt to address these issues, Low-Power High-Resolution Analog-to-Digital Converters specifically focus on: i) improving the power efficiency for the high-speed, and low spurious spectral A/D conversion performance by exploring the potential of low-voltage analog design and calibration techniques, respectively, and ii) development of circuit techniques and algorithms to enhance testing and debugging potential to detect errors dynamically, to isolate and confine faults, and to recover errors continuously. The feasibility of the described methods has been verified by measurements from the silicon prototypes fabricated in standard 180nm, 90nm and 65nm CMOS technology.
650			_aEngineering. _996
650			_aEngineering. _996
650			_933761 _aCOMPUTER, AIDED ENGINEERING (CAD, CAE) AND DESIGN
650			_933757 _aCOMPUTER AIDED DESIGN
650			_933664 _aELECTRONICS AND MICROELECTRONICS, INDTRUMENTATION
650			_933660 _aCIRCUITS AND SYSTEMS.
650			_933659 _aELECTRONICS
650			_933673 _aSYSTEMS ENGINEERING
700			_aPineda de Gyvez, Jos'. _935165
700			_eauthor. _935166
710			_aSpringerLink (Online service) _9111
856			_uhttp://springer.escuelaing.metaproxy.org/book/10.1007/978-90-481-9725-5 _yir a documento _qURL
942			_2ddc _cCF
999			_c14388 _d14388